Interdisciplinary Workshop On Mathematics and Integrated Circuit EDA
Time: December 20, 2023
Venue: Lecture Hall, Jiayibing Building, Jingchunyuan 82, BICMR
Description:
This workshop discusses the major bottlenecks in the Electronic Design Automation (EDA) toolchain, focusing on advanced process constraints. It aims to deeply integrate mathematical mechanisms and data patterns, initiating systematic research in machine learning modeling, mathematical optimization methods, and high-performance parallel computing technologies.
Time: December 20, 2023
Venue: Lecture Hall, Jiayibing Building, Jingchunyuan 82, BICMR
Organizing Committee:
Zaiwen Wen (Peking University)
Yibo Lin (Peking University)
Yuanqing Chen (Beihang University)
Wenjian Yu (Tsinghua University)
Tentative schedules:
(Each presentation is 15 minutes + 5 minutes for Q&A)
1:30-1:35 |
Opening remarks |
|
1:35-1:55 |
Deng Zhanwang |
An Augmented Lagrangian Primal-Dual Semismooth Newton method for multi-block composite optimization |
1:55-2:15 |
Chen Cheng |
A Monte Carlo Policy Gradient Method with Local Search for Binary Optimization |
2:15-2:35 |
Xie Zhonglin |
ODE-based Learning to Optimize |
2:35-2:55 |
Chen Yifan |
Mixed-Size Placement Considering Second-Order Information |
2:55-3:10 |
Coffee Break |
|
3:10-3:30 |
Guo Zizheng |
Heterogeneous Static Timing Analysis with Advanced Delay Calculator |
3:30-3:50 |
Du Yufan |
Cross-Stage Power Prediction with Multi-Modal Learning |
3:50-4:10 |
Shen Shan |
Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on SRAM Designs |
4:10-4:30 |
Longze Wang |
MCSTA: Matrix Completion Static Timing Analysis Acceleration Algorithm for Partially Operated STAs |
4:30-4:45 |
Coffee Break |
|
4:45-5:05 |
Liu Zhiqiang |
Accuracy-preserving reduction of sparsified reduced power grids with a multilevel node aggregation scheme |
5:05-5:25 |
Cheng Jiawen |
Nested dissection based parallel transient power grid analysis on public cloud virtual machines |
5:25-5:45 |
Bingrui Zhang/Xin Zhao |
T-Fusion: Thermal Prediction of 3D ICs with Multi-fidelity Fusion |
5:45-6:05 |
Zhelong Wang |
BoCNT: A Bayesian Optimization Framework for Global CNT Interconnect Optimization |